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Appendix B: Gallium Arsenide as a High-Temperature Material Recent advances in the quality of devices have moved this well-known semiconductor into the forefront of high- temperature electronics. In comparison to silicon, the wide bandgap of GaAs (and GaAs-based alloys) makes it an intrinsically high-temperature material (Sze, 1981~. However, because the bandgap of GaAs is not as wide as that of SiC, it is not as suitable for very high temperatures (above 400 °C; Fricke et al., 19891. Over the years, GaAs FET-based high-temperature technology has devel- oped into a well-established large-scale integrated technol- ogy, with some inroads into the very-large-scale-integrated (VLSI) arena. Although the developments in GaAs heterostructure bipolar transistors (HBTs) have also been significant, the technology for their fabrication is much less developed than that for MESFETs and heterostructure field-effect transistors (HFETS). As this technology develops, HBTs may become the preferred device for high-temperature electronics. Unlike emerging SiC technology, existing GaAs material and fabrication technology is currently able to produce integrated digital, analog, microwave, and opto-electronic circuits. The high- temperature potential of GaAs-based integrated circuit technologies is reviewed in this appendix. STATUS OF COMMERCIAL VLSI GaAs DEVICES FOR HIGH-TEMPERATURE ELECTRONICS The failure modes observed to date for GaAs devices have primarily been wear-out mechanisms caused by metal-GaAs interdiffusion (Christou et al., 1985; Magist- rali et al., 19911. In normal operation of GaAs MESFETs with gold (most often being Ti/Pt/Au or Ti/Pd/Au) or aluminum metallization, the major modes of failure are (1) ohmic contact degradation caused by interdiffusion to the source or drain of FET structures; (2) degradation of 87 Schottky gates caused by interdiffusion to the channel of FET structures; and (3) electromigration, usually within aluminum metallization, on surfaces (Maurer et al., 1990~. When the heterostructure FETs (HFET or MOD- FET for modulation-doped FET), also known by many other acronyms (HEMT for high electron mobility transistor, SDHT for selectively doped heterojunction transistor, TGFET for two-dimensional electron gas FET, SISFET for semiconductor-insulator-semiconductor FET, HIGFET for heterojunction insulated-gate FET, and complementary HFETs) or HBTs are evaluated, one must add to the above MESFET failure modes interdiffusion between semiconductor layers. This can destroy the stability of the desired heterostructure (Maurer et al., 1990~. In general, MESFETs exhibit higher gate leakage currents than MOSFETs because the channel isolations from their gates are made of reverse-biased Schottky junctions in which the leakage is orders of magnitude higher than the oxides used in the latter devices. In addition, the MESFETs are likely to suffer from electron injection from the channel into the substrate because of the high electric fields generally prevailing near the drain of the devices (Shoucair and Ojala, 1992~. Still, silicon transistors can only reach 200 °C if their leakage currents are properly compensated at such temperatures. In addition, the 200 °C maximum temperature for silicon devices corresponds to at least 400 °C for GaAs (Fricke et al., 1989~. Recently, the performance of commercially available VLSI GaAs devices in elevated temperatures (200-400 °C) has been a subject of extensive studies (Bottner et al., 1991; Schweeger et al., 1991; Anholt and Swirhun, 1991; Simons et al., 19941. The device degrada- tion at these elevated temperatures was attributed to drain leakage currents that caused increased output conductance, poor pinch-off characteristics, and low current-on over
Materials for High-Temperature Semiconductor Devices current-off (Ion/Ioff) ratios (Lee et al., 1994~. Shoucair and Ojala (1992) reported on the effects of elevated tempera- tures on the large- and small-signal electrical parameters of commercially available enhancement- and depletion- mode GaAs MESFETs. These MESFETs were fabricated with a tungsten nitride gate and AuGe/Ni/Au ohmic contacts. Their experimental data suggest that while GaAs MESFETs generally exhibit degradation mechanisms similar to those of silicon MOSFETs at elevated tempera- tures, they incur several additional effects that include (1) an increased gate leakage current; (2) a lowered Schottky barrier height; (3) a lowered sensitivity to sidegating and backdating; (4) a lowered input resistance; and (5) an increased drain resistance (Shoucair and Ojala, 19921. The authors concluded that the leakage current of commercial- ly available GaAs MESFETS, between room temperature and 400 °C, is caused by the generation-recombination mechanism. As can be seen in Figure B-1, the leakage current varies in direct proportion to the intrinsic carrier concentration ni(T), as does the variation of GaAs sub- strate resistivity with temperature (Shoucair and Ojala, 1992~. Shenoy et al. (1994) recently studied the self-aligned VLSI GaAs MESFETs with tungsten-based refractory- metal Schottky gates and nickel-based refractory-metal 1mA 1 OOmA 400 300 -( ~ I I Temperature (°C) 200 100 25 ' ' ' '1 10mA _ I\\ \ n'(GaAs)_ 1010 ~80 c 1 nA ~ (MESFE ~\~: ~1 0 A ^ 70 lOOnA10 500 Of 10nAt If\ DO :102a E Si nj2(Si) 1 0Z7 1pA: ~ V~] 1 OOpA _ \ ~\ \e 26 ~20 = 2 am processes 0.05V \ ~ ~ n-channeldevices ~ \ Ct 10 1 0pA ~ = 1 001lm/2pm I'. 1pA 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 1000/T, (1/K) FIGURE B-1 GaAs MESFET and silicon MOSFET drain leakage currents. SOURCE: Shoucair and Oj ala (1992), ~ 1992 IEEE. 88 ohmic contacts. These commercially available devices were shown to be stable after three hours at temperatures up to 500 °C (Figure B-2), with a significant degradation of the transconductance, am, seen above 500 °C. Sokolich et al. (1991) described microwave FETs with an 800-hour lifetime at 250 °C, apparently limited by ohmic contact degradation. Another study by Esfan- diari et al. (1990) revealed that when ion-implanted GaAs MESFETs are subject to temperatures of 125 °C for 10,000 hours, they show no degradation of the ohmic contacts and gate metallization. Fricke et al. (1989) have demonstrated that using ohmic contacts with a WSi2 diffusion barrier and properly optimized passivated surfaces allow reliable device operation up to 300 °C, thereby proving the adaptability of state-of-the-art GaAs fabrication techniques for high-temperature applications. APPROACHES FOR IMPROVING GaAs IC HIGH-TEMPER\T[1RE LIMITS In this section, different existing GaAs-based devices for high-temperature applications are described based on information provided in the literature (Hartnagel, 1992; Dreike et al., 19941. Several valuable experimental papers (Fricke et al., 1989; Anholt and Swirhun, 1991; Bottner et al., 1991; Schweeger et al., 1991; Sokolich et al., 1991; Swirhun et al., 1991; Hartnagel, 1992; Lee et al., 1994, 1995; Reston et al., 1994; Simons et al., 1994) have been published that point out the potential advantages ~ ~- ~ . _\ Pre-anneal 1 ~1 0 100 200 300 400 500 600 700 Anneal Temperature (°C) FIGURE B-2 MESFET transconductance, am, after three-hour anneals at various temperatures. SOURCE: Shenoy et al. (1994), 1994 IEEE.
Appendix B: Gallium Arsenide as a High-Temperature Material 4\\\\\\\\\\\\\\~ Au(50nm) -W...Si(~50nm) Ti (5nm) -W...Si( 50nm) Ni (10nm) Au (2.5nm) ~ Ge (20nm) GaAs FIGURE B-3 Diffusion bamer constructed of nine alternating layers of electron-beam evaporated tungsten and silicon. SOURCE: Fricke et al. (1989), ~ 1989 IEEE. Of this semiconductor material. Fricke et al. (1989) reported that GaAs MESFETs experienced no device deterioration at 300 °C, even after storage, without bias at this temperature for more than 1,000 hours. The high reliability of these devices was mainly due to a diffusion barrier of WSi2 in the ohmic contacts and an optimized Si3N4 passivation. The diffusion barrier was constructed of nine alternating layers of electron-beam evaporated tungsten and silicon that, after rapid thermal annealing at 640 °C, formed a 1,000-A-thick WSi2 layer (Fricke et al., 1989~. Figure B-3 shows the structure of an ohmic contact Conventional Recess Gate Au/Ge Ohmic Ti/Pt/Au Gate \ Low deposition temp SiN passivation Mesa isolation after deposition. A simple operational amplifier construct- ed with these MESFETs functioned at 300 °C (Bottner et al., 1991; Schweeger et al., 19911. Swirhun et al. (1991) demonstrated 100-hour lifetimes at 400 °C for a 1 ~m self-aligned gate (SAG) MESFET with temperature-hard ohmic contacts, buried p-type channel implants, and gate sidewall spacers (Figure B-4~. A SAG process-flow first defines a refractory gate metal (WSI), and then uses this gate pattern to self-align source and drain-dopant implants. This is followed by the deposition of Si3N4 and subsequent implants with activa- tion at 800 °C. In this fabrication sequence, the Schottky gate and passivation layer must be mechanically and chemically stable at temperatures well above the operating range. The Ni/In/Ge/Ni/Mo ohmic contacts are made after gate definition. These ohmic contacts were passiv- ated with 100 nm of Si3N4 and a rapid thermal anneal at 800 °C for Dlve seconds. A 1.0 ,um x 10 ~m depletion-mode MESFET showed on/off current ratio decreasing from 106:1 at room temperature to near 20:1 at 400 °C (Figure B-5; Swirhun et al., 19911. Although this degradation is detrimental for most electronic applications, these devices can be still used for some digital and small-signal radio frequency functions. Lee et al. (1994, 1995) studied the influence of GaAs substrate conduction on FET drain leakage current at elevated temperatures. Other studies have shown the high resistance, undoped AlAs buffer layers to practically eliminate leakage current through the substrate. The Ion/Ioff ratio for the MESFET with a 2,500-A AlAs buffer was 330:1, which is an order of magnitude improvement over High Temperature Self-aligned Gate Ni/ln/Ge/Mo Ohmic \ WSi Gate Sputtered SiN passivation Implant >,_, isolation t.: .. ;! I [ 1 ~ 1 Gate edge sidewall spacer \ nl. r=~ \ I l~r. ~a^o ~ n:GaAs FIGURE B4 Comparison of conventional MESFET with MESFET using temperature-hard ohmic contacts, buried p-type channel implants, and gate sidewall spacers. SOURCE: Swirhun et al. (1991). 89
Materials for High-Temperature Semiconductor Devices 1.2e-3F 1.Oe-3 8.0e-4 a) . _ 6.0e-4 4.0e-4 2.0e-4 O.Oe+O 10-2 r 1!: <= ~ ~o · ~ ~ ~a, · D · ·. ~cn L~;:;;~;;~; 1 -2 -1 0 Gate-source Voltage V9s(V) 10-3 10-4 10-5 10-6 10-7 10-8 10-9 1o-1o 10-11 1 -2 ...~1~11 I . · ~ ~ ~ ~ ~ ~ - ~ ~ ~ ·. T=25°C · T=1 00°C · T=200°C T=300°C T=400°C 1 1 1 1 1 1 -1 Gate-source Voltage V9s(V) 0 1 FIGURE B-5 MESFET showing on/off current ratio decreasing from 106:1 at room temperature to near 20:1 at 400 °C. SOURCE: Swirhun et al. (1991). previously reported results at 350 °C (Simons et al., 1994; Schweeger et al., 1991). This AlAs buffer should also play a major role in reducing backgating effects for ICs. From the work of Lee and his colleagues, it seems that the reduction of Ioff is more dependent on AlAs bulk resistance than conduction-band discontinuity. This study shows that one of the major deterrents (i.e., leakage current through the substrate) of GaAs standard technolo- gy can be removed by adding high resistivity buffer layers, thus making it a viable technology for high- temperature applications. Reston et al. (1994) demonstrated that, through minor modifications to a standard MESFET process, the high- temperature MESFET can be fabricated (Figure B-61. The first improvement involved deposition of a silicon-nitride insulator under the interconnecting metal to reduce parasitic currents. The second modification consisted of MBE deposition of a high-resistivity AlAs buffer layer i~\it Refractory drain / / n-dopedGaAs \\ Refractory source _ l AlAs buffer layer _ __ . , GaAs substrate FIGURE B-6 High-temperature MESFET incorporating modifications to standard process. SOURCE: Lee et al. (1995), ~ 1995 IEEE. below the active device layer to reduce substrate leakage. The final change consisted of a substitution of the conven- tional ohmic contact with a refractory metal stack similar to the one proposed by Swirhun et al. (19911. With these modifications, a high-temperature MESF- ET operating at 350 °C had its output conductance reduced by an order of magnitude (7,700 Q at Vg = 0V), and the off-current reduced to approximately half of the gate leakage current. Figure B-7 shows the I-V character- istics for the typical high-temperature MESFET at 350 °C (Reston et al., 19941. Eden (1994) advised the use of a high barrier poten- tial gate (HiGFET) structure or possibly pen junction gate (JFET) structure instead of a simple MESFET to reduce drain-gate leakage current and raise gate forward voltage. As an extreme to reduce the leakage, Eden suggested using the demonstrated Rockwell "lift-off" technology to transfer GaAs devices to insulating substrate, followed by isolation etch and planarization steps and then generating the metal/dielectric layers required for interconnects. CONCLUSIONS GaAs-based IC technologies are likely to play an important role in the realization of high-temperature devices. Both device physics and semiconductor fabrica- tion technology demonstrate that, for selected applica
Appendix B.: Gallium Arsenide as a High-Temperature Material lions, homojunction electronic GaAs devices are capable of 400 °C DC transistor characteristics and 500 °C storage without bias (Swirhun et al., 19911. With some structural and process modifications, commercially available GaAs MESFETs can be developed for utilization in high-temperature electronics (Schweeger et al., 1991; Swirhun et al., 1991; Lee et al., 1994, 1995; Reston et al., 19941. Thus, for a modest investment in process modification of commercial MESFETS, substantial high- temperature performance characteristics can be realized, and improved devices can be manufactured to support the system requirements up to 400 °C. For GaAs-based and all other IC technologies, development of stable, electromigration-resistant metal systems for interconnecting devices in ICs and the sup- porting packaging technology is an important reliability issue for any high-temperature applications. To achieve this with 104-hour lifetimes will require further develop- ment of interconnection and package technology. With sufficient market pull, GaAs-based technology could be developed for reliable operation up to 400 °C, except for microwave devices. This technology development could be relatively straightforward and would build upon existing infrastructure. However, for the applications that demand temperatures above 400 °C, ternary and quaterna- ry III-V material systems might offer better potential solutions (for example AlGaAs/GaAs diodes and bipolar- junction transistors grown on GaAs substrates, have demonstrated operation to 450 °C (Zipperian, 1986; Fricke et al., 1989; Dreike et al., 1994~. ~ 1.50E-2 - _= ~ DOE-3 n DOE ~ o -5.00E+3 4.00 /~-3.50 /~x-o-o-°-odor_____ 3.00 // do, ~4 _~_~_&,_ ~· -2.50 {3~ -2.00 -1 .50 -1 .00 -0.50 o Do 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 Vds(V) FIGURE B-7 Operating characteristics of MESPET structure shown In [Figure B-6. SOURCE: Lee et al. (1995), ~ 1995 IEEE. 91 REFERENCES Anholt, R., and S. Swirhun. 1991. Measurement and -. analysis of GaAs MESFET parasitic capacitances. IEEE Transactions on Microwave Theory Technology 39~7~: 1247-1251. Bottner, T., K. Fricke, A. Gol&orn, H.L. Hartnagel, A. Rappl, S. Ritter, and J. Wurfl. 1991. Technology and performance of a high temperature stable operational amplifier on GaAs. Pp. 77-84 in Proceedings of the First International High-Temperature Electronics Conference, Albuquerque, New Mexico, June 16-20. Christou. A.. B.R. Wilkins. and W.F. used. 1985. cat Low-temperature epitaxial growth of GaAs on (100) silicon substrates. Electronics Letters 21~91:406-408. Dreike, P.L., D.M. Fleetwood, D.B. King, D.C. Sprauer, and T.E. Zipperian. 1994. An overview of high-temperature electronic device technologies and potential applications. IEEE Transactions on Compo- nents, Packaging, and Manufacturing Technology 17~4~:594-609. Eden, R. 1994. Gallium arsenide and high-temperature packaging. Presentation to the Committee on Materi- als for High-Temperature Semiconductor Devices. Washington, D.C., February 10-11. Esfandiari, R., T.J. O'Neill, T.S. Lin, and R.K. Rono. 1990. Accelerated aging and long-term reliability study of ion-implanted GaAs MMIC if amplified. IEEE Transactions on Electron Devices 37~41:1174- 1177. Fricke, K., H.L. Hartnagel, R. Schulz, G. Schweeger, and J. Wurfl. 1989. A new GaAs technology for stable FETs at 300 °C. IEEE Electron Device Letters 10:577-579. Hartnagel, H.L. 1992. Compound semiconductor devices for operation at elevated temperatures. Microelectron- ic Engineering 19: 115-122. Lee, R., C. Ito, R. Reston, G. Trombleu, B. Johnson, M. Mah, and C. Havasy. 1994. Low Leakage GaAs MESFET Devices Operating to 350 °C Ambient. Paper presented at the Second International High Temperature Electronics Conference, Charlotte, North Carolina, June 5-10. Lee, R., C. Ito, B. Johnson, G. Trombley, R. Reston, M. Mah, and C. Havasy. 1995. High-temperature characteristics of GaAs MESFET devices fabricated
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