The Future of Computing Performance Game Over or Next Level? (2011) / Chapter Skim
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Appendix B: Biographies of Committee Members and Staff
Appendix B: Biographies of Committee Members and Staff
Pages 160-168
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From page 160... ...
He holds a BS in electrical engineering from the University of Michigan and an MS and a PhD from Stanford University. He is a member of the board of Zygo Corporation and the Corporation for National Research Initia tives and serves on the Technology Strategy Committee of the Semiconductor Industry Association.
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From page 161... ...
Colwell was a central processing unit architect at VLIW minisupercomputer pioneer Multiflow Computer, a hardware-design engineer at workstation vendor Perq Systems, and a member of technical staff at Bell Labs. He has published many technical papers and journal articles, is inventor or coinventor on 40 patents, and has participated in numerous panel sessions and invited talks.
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From page 162... ...
Dr. Dally has worked with Cray Research and Intel to incorporate many of those innovations into commercial parallel computers and with Avici Systems to incorporate the technology into Internet routers, and he cofounded Velio Communications to commercialize high-speed signaling technology and Stream Processors to commercialize stream-processor technology.
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From page 163... ...
Pradeep Dubey is a senior principal engineer and director of the Parallel Computing Lab, part of Intel Labs at Intel Corporation. His research focus is computer architectures to handle new application paradigms for the future computing environment efficiently.
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From page 164... ...
Dr. Horowitz has received many awards, including a 1985 Presidential Young Investigator Award, the 1993 ISSCC Best Paper Award, the ISCA 2004 Most Influential Paper of 1989, and the 2006 Don Pederson IEEE Technical Field Award.
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From page 165... ...
Other tools developed include Griffin, static and dynamic analysis for finding security vulnerabilities in Web applications, such as SQL injection; a static and dynamic program query language called PQL; a static memory-leak detector called Clouseau; a dynamic buffer-overrun detector called CRED; and a dynamic error-diagnosis tool called DIDUCE. Previously, Dr.
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From page 166... ...
She and her collab orators have developed compiler optimizations for improving memorysystem performance, high-performance garbage-collection algorithms, scalable explicit-memory management algorithms for parallel systems, and cooperative dynamic optimizations for improving the performance of managed languages. She is leading the compiler effort for the TRIPS project, which is exploring attaining scalable performance improvements using explicit dataflow graph execution architectures.
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From page 167... ...
, National Research Council of the National Academies. She currently directs several CSTB projects, including a study to advise the Centers for Medicare and Medicaid Service on future information systems architectures and a study examining opportunities for computing research to help meet sus
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From page 168... ...
Shenae Bradley is a senior program assistant at the Computer Science and Telecommunications Board of the National Research Council. She currently provides support for the Committee on Sustaining Growth in Computing Performance, the Committee on Wireless Technology Prospects and Policy Options, and the Computational Thinking for Everyone: A Workshop Series Planning Committee, to name a few.
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