The New Global Ecosystem in Advanced Computing Implications for U.S. Competitiveness and National Security (2012) / Chapter Skim
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1 Computer and Semiconductor Technology Trends and Implications
1 Computer and Semiconductor Technology Trends and Implications
Pages 5-16
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From page 5... ...
generation processors. Ongoing and predictable improvements in processor performance created a cycle 1.1 Interrelated Challenges to Continued of improved single-processor performance followed by Performance Scaling enhanced software functionality.
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The technical challenges related to scaling nanometer devices, what the shift to multicore architectures means for architectural innovation, programming explicitly parallel hardware, increased heterogeneity in hardware, and the need for correct, secure, and evolvable software are then discussed. 1.1.1 Hardware-Software Virtuous Cycle The hardware and performance improvements described above came with a stable programming FIGURE 1-1 Cracks in the hardware-software virtuous cycle.
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From page 7... ...
performance could also come from efficient implementation techniques for high-level programming language abstractions. 1.1.2 Problems in Scaling Nanometer Devices Early in the 2000s, semiconductor scaling -- the process of technology improvement so that it performs the same functionalities at ever smaller scales-encountered fundamental physical limits that now make it impractical to continue along the historical paths to ever-increasing performance.4 Expected improvements in both performance and power achieved with technology scaling have slowed from their historical rates, whereas implicit expectations were that chip speed and performance would continue to increase dramatically.
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Multicore Continuing the progress of semiconductor scaling -- chips consisting of less complex cores that exploited whether used for multiple cores or not -- is now only the most effective ILP ideas were developed. These dependent on innovation in structures and materials to chips offered the promise of performance scaling linearly overcome the reduced performance scaling traditionally with power.
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Sequential software no longer becomes faster Fourth, power efficiency is increasingly a major with every hardware generation, and software needs to factor in the design of multicore chips. Power has gone be written to leverage parallel hardware explicitly.
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Second, parallel languages are dependent on the number of creating software that exploits hardware specialization hardware processors. Further developments in parallel and heterogeneity closely couples hardware and software are necessary to be performance portable, that software -- such coupling may be good for performance, is, it should execute on a variety of parallel computing power, and energy, but it typically sacrifices software platforms and should show performance in proportion to portability to different hardware, a mainstay expectation the number of processors on all these platforms without in computing over many decades.
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In an era where new technologies -- at all levels of the system -- appear 1.2 Future Directions for Hardware and Software quickly, yet the rate of hardware performance Innovation improvement is slowing, an alternative to the virtuous cycle described earlier is essential. Rather than Section 1.1 outlined many of the technological remaining oblivious to hardware shifts, new approaches challenges to continued growth in computing and methodologies are needed that allow our complex performance and some of the implications (e.g., the shift software systems to evolve nimbly, using new to multicore and increased emphasis on power technologies and adapting to changing conditions for efficiency.)
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From page 12... ...
Creating software systems and applications for More heterogeneity will arise from expanded use of parallel, power-constrained computing systems on a accelerators and reconfigurable logic, described earlier, single chip requires innovations at all levels of the that is needed for increased performance under power software-hardware design and engineering stack: constraints. Accelerators are so-named because they can algorithms, programming models, compilers, runtime accelerate performance.
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A key requirement will be to create modular power core have recently been announced.15 Multicore programming models that make it possible to chips are now ubiquitous across the entire range of encapsulate parallel software in libraries in such a way computing devices. that (1)
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This slowdown has, among other imposes additional requirements on developers, with things, driven a shift from the single microprocessor "apps" having to be approved by the hardware vendors computer architectures to homogenous and now before deployment. There are advantages and heterogeneous multicore processors, which break the disadvantage to each approach, but changes in the virtuous cycle that most software innovation has amount and locus of control over software deployments expected and relied on.
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From page 15... ...
COMPUTER AND SEMICONDUCTOR TECHNOLOGY TRENDS AND IMPLICATIONS 15 industry has become a global enterprise, fueled by reinforces the critical need for the United States to assess increasingly competitive overseas semiconductor the geographic and technological landscape of research markets and firms that have made large and focused and development focused on this and other areas of investments in the computing space over the last decade. computer and semiconductor innovation.
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